# DXBC Compute Shader Validation Issue

## Problem

The DXBC emitter produces valid bytecode for vertex and fragment shaders (all pass `D3DDisassemble` validation), but compute shaders cause a C++ exception (`0xe06d7363`) in `d3dcompiler_47.dll` during disassembly.

## Root Cause (Suspected)

The compute shader SHEX chunk likely has issues with:

1. **Declaration ordering** — Reference compute shaders from `fxc` emit declarations in this order: `dcl_globalFlags`, `dcl_uav_*`, `dcl_input vThreadID`, `dcl_temps`, `dcl_thread_group`. Our emitter emits `dcl_temps` first, then `dcl_globalFlags`, then `dcl_input`, then `dcl_thread_group`. D3DDisassemble may enforce a specific declaration order for compute shaders.

2. **Missing UAV declarations** — The `compute_basic.luma` test writes to a buffer but the emitter doesn't emit `dcl_uav_typed` or `dcl_uav_structured` declarations. The SHEX references buffer operands without corresponding declarations, which likely causes the crash.

3. **SYNC instruction encoding** — The emitter emits `SYNC` (opcode 0xA8) for barriers. The encoding may have incorrect control bits or placement.

## Reproduction

```sh
luma compile --target=dxbc tests/shaders/compute_basic.luma -o compute.dxbc
python3 tools/dxbc_validate.py compute.dxbc
# Result: Windows Error 0xe06d7363 (C++ exception in d3dcompiler)
```

## What Works

All 10 vertex/fragment test shaders pass `D3DDisassemble`:
- basic_vertex, basic_fragment, pbr_fragment, loop_control, multi_binding,
  inline_entry, spec_constant, splat_test, varying_test, minimal_vs

## Fix Plan

1. Implement `dcl_uav_typed` / `dcl_uav_structured` for buffer bindings
2. Enforce correct declaration order in the SHEX chunk (globals, resources, inputs, temps, thread_group)
3. Verify SYNC instruction encoding against fxc reference output
4. Add structured buffer read/write instruction encoding (`ld_structured`, `store_structured`)